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parameter cl8282a cl8452a cl8636a cl8820a cl81188a available gates 5,000 8,000 12,000 16,000 24,000 useable gates 2,500 4,000 6,000 8,000 12,000 flip-flops 282 452 636 820 1,188 logic elements 208 336 504 672 1,008 max us er i/o pins 78 120 136 152 184 packages 84 pin plcc 100 pin tqfp 84 pin plcc 100 pin tqfp 160 pin pqfp 84 pin plcc 160 pin pqfp 208 pin pqfp 144 pin tqfp 160 pin pqfp 208 pin pqfp 208 pin pqfp 240 pin pqfp 8k tbl 01 december 2000 page 1 u laser-configured asic (lasic ? ) technology offers the ultimate combination of performance, flexibility, and low cost u functionally, architecturally, and electrically compatible with industry-standard flex ? 8000 series fpgas u high density - 2,500 usable gates - 282 flip-flops - 78 maximum user i/o pins u laser fuse technology provides very fast, dense interconnect routing u optional instant-on configuration eliminates the need for an external configuration eprom u fabricated using 0.5 micron cmos process u very low current consumption (active and standby) u alpha particle immune cl8000 product family overview cl8282a laser-configured asic family key features
the clear logic cl8000 laser-configured asic (lasic ? ) family offers the ultimate combination of performance, flexibility, and cost. this family is a system level second source to altera flex ? 8000 products. for designs not requiring in-system reprogrammability, design verification can be performed using the programmable altera devices, and clear logic lasics can be used for low cost, high volume production. clear logic?s innovative laser asic technology eliminates nre costs, test vector development, ordering minimums and long lead times. no re-simulation or re-layout is required, as the device is engineered using a cell-based, pld-like architecture. clear logic?s testcell technology ensures complete test coverage through the use of specialized testing modes which are transparent to the user. the clear logic cl8000 laser-configured asic family is based upon a large array of logic elements. each logic element contains a configurable look up table for combinatorial functions and a register for sequential operations. a group of eight logic elements forms a block. laser-configured metal fuses implement logical functions and control signal routing laser configuration provides reduced cost and enhanced performance. these inherent performance benefits include extremely consistent propagation delays, reduced power consumption, and improved immunity to noise and upset events. clear logic?s cl8000 lasic ? family is compatible with all six configuration modes defined for the flex ? 8000 product family. these configuration modes include the following: u active serial u active parallel up u active parallel down u passive parallel synchronous u passive parallel asynchronous u passive serial description cl8282a laser-configured asic page 2 configuration
the cl8000 is already configured when it is shipped, and can be configured to bypass the flex ? 8000 configuration modes. this ?instant-on? configuration mode eliminates the need for external eproms or microcode. in the instant-on mode, the cl8000 device begins initialization immediately upon a low-to- high transition on the nconfig pin. for further information on designing with the cl8000 lasic family, please refer to the following documents: u an-01: requesting a first article. this document provides instructions on how to submit a bitstream file for generation of first articles. u an-02: clear logic packaging guide. this document provides specifications and drawings for packages used by the cl10k family and other clear logic devices. u an-03: cl8000 and system configuration. this document contains a detailed discussion of all aspects of configuring cl8000-based systems. u an-04: cl8000 technology white paper. this document outlines the technologies employed by the cl8000 lasic family. u an-05: calculating cl8000 power consumption. this document provides guidelines for calculating power consumption based on cl8000 design characteristics. u an-06: eliminating the serial eprom from flex 8000 designs. this document outlines how additional savings can be achieve by removing the eprom from the cl8000 lasic family. u an-07: cl8000 test methodology. this document describes how clear logic provides 100% stuck-at fault coverage. u an-08: cl8000 lasic timing and function compatibility. this document shows how a seamless conversion from fpga to asic can be achieve with no additional engineering can be achieved with clear logic. additional information cl8282a laser-configured asic page 3
cl8282a laser-configured asic page 4 l b b l b b l b b l b b l b b l b b c o n f i g u r a t i o n a n d e m u l a t i o n l o g i c n s p m s e l 0 m s e l 1 n c o n f i g n w s n r s n c s c s c l k u s r n s t a t u s d c l k c o n f _ d o n e d a t a 7 d a t a [ 0 : 6 ] r d c l k r d y n b u s y a d d [ 0 : 1 7 ] t d i t d o t c k t m s n t r s t u s e r - d e f i n e d i n p u t / o u t p u t s i o e i o e i o e l b b : l o g i c b u i l d i n g b l o c k i o e : i n p u t / o u t p u t e l e m e n t d i : d e d i c a t e d i n p u t i o e i o e u s e r - d e f i n e d i n p u t / o u t p u t s a r r a y s i z e : 2 6 l b b s ( 2 r o w s b y 1 3 c o l u m n s ) i o e i o e i o e i o e i o e d i 8 2 8 2 a d r w 0 1 block diagram
cl8282a laser-configured asic page 5 pin configuration p i n n a m e 8 4 p i n p l c c 1 0 0 p i n t q f p n s p 7 5 7 5 m s e l 0 7 4 7 4 m s e l 1 5 3 5 1 n s t a t u s 3 2 2 4 n c o n f i g 3 3 2 5 d c l k 1 0 1 0 0 c o n f _ d o n e 1 1 1 n w s 3 0 2 2 n r s 4 8 4 2 r d c l k 4 9 4 5 n c s 2 9 2 1 c s 2 8 1 9 r d y n b u s y 7 7 7 7 c l k u s r 5 0 4 7 a d d 1 7 5 1 4 9 a d d 1 6 3 6 2 8 a d d 1 5 5 6 5 5 a d d 1 4 5 7 5 7 a d d 1 3 5 8 5 8 a d d 1 2 6 0 5 9 a d d 1 1 6 1 6 0 a d d 1 0 6 2 6 1 a d d 9 6 3 6 2 a d d 8 6 4 6 4 a d d 7 6 5 6 5 8 2 8 2 a t b l 0 1 a
cl8282a laser-configured asic page 6 pin configuration p i n n a m e 8 4 p i n p l c c 1 0 0 p i n t q f p a d d 6 6 6 6 6 a d d 5 6 7 6 7 a d d 4 6 9 6 8 a d d 3 7 0 6 9 a d d 2 7 1 7 1 a d d 1 7 6 7 6 a d d 0 7 8 7 8 d a t a 7 3 9 0 d a t a 6 4 9 1 d a t a 5 6 9 2 d a t a 4 7 9 5 d a t a 3 8 9 7 d a t a 2 9 9 9 d a t a 1 1 3 4 d a t a 0 1 4 5 t d i 5 5 5 4 t d o 2 7 1 8 t c l k 7 2 7 2 t m s 2 0 1 1 n t r s t 5 2 5 0 d e d i c a t e d i n p u t s 1 2 , 3 1 , 5 4 , 7 3 3 , 2 3 , 5 3 , 7 3 v c c i n t 1 7 , 3 8 , 5 9 , 8 0 6 , 2 0 , 3 7 , 5 6 , 7 0 , 8 7 g n d 5 , 2 6 , 4 7 , 6 8 2 , 1 3 , 3 0 , 4 4 , 5 2 , 6 3 , 8 0 , 9 4 n c ( n o c o n n e c t ) - - t o t a l u s e r i / o p i n s 6 4 7 4 8 2 8 2 a t b l 0 1 b
cl8282a laser-configured asic page 7 absolute maximum ratings recommended operating conditions [2] dc electrical s pecifications s y m b o l p a r a m e t e r c o n d i t i o n s m i n m a x u n i t v c c i n t s u p p l y v o l t a g e , i n t e r n a l l o g i c a n d i n p u t b u f f e r s c o m m e r c i a l g r a d e d e v i c e s 4 . 7 5 5 . 2 5 v i n d u s t r i a l g r a d e d e v i c e s 4 . 5 0 5 . 5 0 v v c c i o d c i n p u t v o l t a g e 5 . 0 v o l t c o m m e r c i a l 4 . 7 5 5 . 2 5 v 5 . 0 v o l t i n d u s t r i a l 4 . 5 0 5 . 5 0 v 3 . 3 v o l t o p e r a t i o n 3 . 0 0 3 . 6 0 v v i i n p u t v o l t a g e 0 v c c i n t v v o o u t p u t v o l t a g e 0 v c c i o v t a o p e r a t i n g t e m p e r a t u r e c o m m e r c i a l t e m p e r a t u r e r a n g e 0 7 0 c i n d u s t r i a l t e m p e r a t u r e r a n g e - 4 0 8 5 c t r i n p u t s i g n a l r i s e t i m e 4 0 n s t f i n p u t s i g n a l f a l l t i m e 4 0 n s t r v c c v c c r i s e t i m e 1 0 0 m s 8 k t b l 0 3 s y m b o l p a r a m e t e r c o n d i t i o n s m i n m a x u n i t v c c s u p p l y v o l t a g e - 2 . 0 7 . 0 v v i d c i n p u t v o l t a g e [ 1 ] - 2 . 0 7 . 0 v i o u t d c o u t p u t c u r r e n t , p e r p i n - 2 5 2 5 m a t s t g s t o r a g e t e m p e r a t u r e n o b i a s - 6 5 1 5 0 c t a m b a m b i e n t t e m p e r a t u r e u n d e r b i a s - 6 5 1 3 5 c t j j u n c t i o n t e m p e r a t u r e u n d e r b i a s 1 3 5 c 8 k t b l 0 2
cl8282a laser-configured asic page 8 capacitance dc electrical s pecifications cont. s y m b o l p a r a m e t e r c o n d i t i o n s m i n m a x u n i t c i n i n p u t c a p a c i t a n c e v i n = 0 v , f = 1 . 0 m h z 1 0 p f c o u t o u t p u t c a p a c i t a n c e v o u t = 0 v , f = 1 . 0 m h z 1 0 p f 8 k t b l 0 5 dc electrical characteristics (over the operating range) s y m b o l p a r a m e t e r c o n d i t i o n s m i n t y p [ 3 ] m a x u n i t v i h i n p u t h i g h v o l t a g e 2 . 0 v c c i n t + 0 . 3 v v i l i n p u t l o w v o l t a g e - 0 . 3 0 . 8 v v o h o u t p u t h i g h v o l t a g e i o h = - 4 . 0 m a , v c c i o = v c c i o [ m i n ] 2 . 4 v v o l o u t p u t l o w v o l t a g e i o l = 1 2 . 0 m a , v c c i o = v c c i o [ m i n ] 0 . 4 5 v i i n i n p u t l e a k a g e c u r r e n t v i = v c c o r g n d - 1 0 1 0 a i o z o u t p u t l e a k a g e c u r r e n t v o = v c c o r g n d - 4 0 4 0 a i c c 0 s t a n d b y c u r r e n t v i = g n d , n o l o a d 0 . 5 1 0 m a 8 k t b l 0 4
cl8282a laser-configured asic page 9 ac electrical s pecifications s y m b o l p a r a m e t e r c o n d i t i o n s m i n m a x m i n m a x m i n m a x u n i t t i o d i o e r e g i s t e r d a t a d e l a y 0 . 7 0 . 8 0 . 9 n s t i o c i o e r e g i s t e r c o n t r o l s i g n a l d e l a y 1 . 7 1 . 8 1 . 9 n s t i o e o u t p u t e n a b l e d e l a y 1 . 7 1 . 8 1 . 9 n s t i o c o i o e r e g i s t e r c l o c k t o o u t p u t d e l a y 1 . 0 1 . 0 1 . 0 n s t i o c o m b i o e c o m b i n a t o r i a l d e l a y 0 . 3 0 . 2 0 . 1 n s t i o s u i o e r e g i s t e r s e t u p t i m e b e f o r e c l o c k 1 . 4 1 . 6 1 . 8 n s t i o h i o e r e g i s t e r h o l d t i m e a f t e r c l o c k 0 . 0 0 . 0 0 . 0 n s t i o c l r i o e r e g i s t e r c l e a r d e l a y 1 . 2 1 . 2 1 . 2 n s t i n i n p u t p a d a n d b u f f e r d e l a y 1 . 5 1 . 6 1 . 7 n s t z x o u t p u t b u f f e r d i s a b l e d e l a y [ 6 ] c l = 5 p f 1 . 4 1 . 6 1 . 8 n s s p e e d : - 2 s p e e d : - 3 s p e e d : - 4 s l o w s l e w r a t e = o f f , v c c i o = 5 . 0 v , c l = 3 5 p f 4 . 6 5 . 1 4 . 9 1 . 8 n s n s 5 . 3 1 . 4 1 . 6 s l o w s l e w r a t e = o f f , v c c i o = 5 . 0 v , c l = 3 5 p f s l o w s l e w r a t e = o f f , v c c i o = 5 . 0 v , c l = 3 5 p f s l o w s l e w r a t e = o f f , v c c i o = 5 . 0 v , c l = 3 5 p f o u t p u t b u f f e r a n d p a d d e l a y [ 6 ] o u t p u t b u f f e r a n d p a d d e l a y [ 6 ] o u t p u t b u f f e r a n d p a d d e l a y [ 6 ] t z x 3 t z x 1 t o d 3 n s 5 . 2 4 . 9 8 k t b l 0 6 a t o d 1 o u t p u t b u f f e r a n d p a d d e l a y [ 6 ] 1 . 1 1 . 4 1 . 7 n s i/o element timing parameters [5] s y m b o l p a r a m e t e r c o n d i t i o n s m i n m a x m i n m a x m i n m a x u n i t t d r r r e g i s t e r t o r e g i s t e r d e l a y v i a f o u r l e s , t h r e e r o w i n t e r c o n n e c t s , a n d f o u r l o c a l i n t e r c o n n e c t s 1 5 . 8 1 9 . 8 2 4 . 8 n s t o d h o u t p u t d a t a h o l d t i m e a f t e r c l o c k 1 . 0 1 . 0 1 . 0 n s s p e e d : - 2 s p e e d : - 3 s p e e d - 4 8 k t b l 0 7 a external timing parameters [4]
cl8282a laser-configured asic page 10 s y m b o l p a r a m e t e r c o n d i t i o n s m i n m a x m i n m a x m i n m a x u n i t t l a b c a s c c a s c a d e d e l a y b e t w e e n l e s i n d i f f e r e n t l a b s 0 . 3 0 . 3 0 . 4 n s t l a b c a r r y c a r r y d e l a y b e t w e e n l e s i n d i f f e r e n t l a b s 0 . 3 0 . 3 0 . 4 n s t l o c a l l a b l o c a l i n t e r c o n n e c t d e l a y 0 . 5 0 . 6 0 . 8 n s t r o w r o w i n t e r c o n n e c t r o u t i n g d e l a y 4 . 2 4 . 2 4 . 2 n s t c o l c o l u m n i n t e r c o n n e c t r o u t i n g d e l a y 2 . 5 2 . 5 2 . 5 n s t d i n _ c d e d i c a t e d i n p u t t o l e c o n t r o l d e l a y 5 . 0 5 . 0 5 . 5 n s t d i n _ d d e d i c a t e d i n p u t t o l e d a t a d e l a y 7 . 2 7 . 2 7 . 2 n s t d i n _ i o d e d i c a t e d i n p u t t o i o e c o n t r o l d e l a y 5 . 0 5 . 0 5 . 5 n s 8 k t b l 0 9 a s p e e d : - 4 s p e e d : - 3 s p e e d : - 2 s y m b o l p a r a m e t e r c o n d i t i o n s m i n m a x m i n m a x m i n m a x u n i t t l u t l o o k u p t a b l e d e l a y f o r d a t a - i n 2 . 0 2 . 5 3 . 2 n s t c l u t l o o k u p t a b l e d e l a y f o r c a r r y - i n 0 . 0 0 . 0 0 . 0 n s t r l u t l o o k u p t a b l e d e l a y f o r l e r e g i s t e r f e e d b a c k 0 . 9 1 . 1 1 . 5 n s t g a t e c a s c a d e g a t e d e l a y 0 . 0 0 . 0 0 . 0 n s t c a s c c a s c a d e c h a i n r o u t i n g d e l a y 0 . 6 0 . 7 0 . 9 n s t c i c o c a r r y - i n t o c a r r y - o u t d e l a y 0 . 4 0 . 5 0 . 6 n s t c g e n d a t a - i n t o c a r r y - o u t d e l a y 0 . 4 0 . 5 0 . 7 n s t c g e n r l e r e g i s t e r f e e d b a c k t o c a r r y - o u t d e l a y 0 . 9 1 . 1 1 . 5 n s t c l e r e g i s t e r c o n t r o l s i g n a l d e l a y 1 . 6 2 . 0 2 . 5 n s t c h c l o c k h i g h t i m e 1 . 7 1 . 7 2 . 7 n s t c l c l o c k l o w t i m e 1 . 7 1 . 7 2 . 7 n s t c o l e r e g i s t e r c l o c k - t o - o u t p u t d e l a y 0 . 4 0 . 5 0 . 6 n s t c o m b c o m b i n a t o r i a l d e l a y 0 . 4 0 . 5 0 . 6 n s t s u l e r e g i s t e r s e t u p t i m e b e f o r e c l o c k 0 . 8 1 . 1 1 . 2 n s t h l e r e g i s t e r h o l d t i m e a f t e r c l o c k 0 . 9 1 . 1 1 . 5 n s t p r e l e r e g i s t e r p r e s e t d e l a y 0 . 6 0 . 7 0 . 8 n s t c l r l e r e g i s t e r c l e a r d e l a y 0 . 6 0 . 7 0 . 8 n s 8 k t b l 0 8 a s p e e d : - 2 s p e e d : - 3 s p e e d : - 4 ac electrical s pecifications cont. logic element timing parameters [5] interconnect timing parameters [5]
cl8282a laser-configured asic page 11 ordering information 1. during transitions, inputs may undershoot to -2.0v for periods shorter than 20ns. otherwise, minimum dc input voltage is -0.3v. 2. the following devices do not have v ccio pins: cl8282a, cl8452a. for these devices, all references to v ccio should be changed to v ccint 3. typical values are at v cc of 5.0 volts and ambient temperature of 25 oc. 4. guaranteed but not tested. characterized initially, and after any design changes which may affect these parameters. 5. internal timing delays are based on characterization, and cannot be explicitly tested. internal timing parameters should be used for performance estimation only. 6. use ac test conditions set-up b for these parameters. 16 jan. 1998: created new document 31 jul. 1999: recompiled databook, 8820 package update. 29 nov. 1999: remove reference to the 8282av device which is not supported. 01 dec. 2000: review and reprint. ac t est conditions 4 6 4 w 2 5 0 w 3 5 p f v c c i o o u t p u t i n c l u d e s j i g c a p a c i t a n c e 4 6 4 w 2 5 0 w 5 p f v c c i o o u t p u t i n c l u d e s j i g c a p a c i t a n c e ( a ) ( b ) 3 n s 3 n s 3 . 0 v 9 0 % 1 0 % g n d 9 0 % 1 0 % a l l i n p u t p u l s e s 8 k d r w 0 1 notes to t ables revision history p a r t n u m b e r t e m p e r a t u r e r a n g e p a c k a g e t y p e s p e e d a l t e r a e q u i v a l e n t c l 8 2 8 2 a l c 8 4 - 4 c o m m e r c i a l 8 4 - p i n p l c c - 4 ( s l o w e s t ) e p f 8 2 8 2 a l c 8 4 - 4 c l 8 2 8 2 a l c 8 4 - 3 - 3 e p f 8 2 8 2 a l c 8 4 - 3 c l 8 2 8 2 a l c 8 4 - 2 - 2 ( f a s t e s t ) e p f 8 2 8 2 a l c 8 4 - 2 c l 8 2 8 2 a t c 1 0 0 - 4 1 0 0 - p i n p l a s t i c t q f p - 4 ( s l o w e s t ) e p f 8 2 8 2 a t c 1 0 0 - 4 c l 8 2 8 2 a t c 1 0 0 - 3 - 3 e p f 8 2 8 2 a t c 1 0 0 - 3 c l 8 2 8 2 a t c 1 0 0 - 2 - 2 ( f a s t e s t ) e p f 8 2 8 2 a t c 1 0 0 - 2 c l 8 2 8 2 a l i 8 4 - 4 i n d u s t r i a l 8 4 - p i n p l c c - 4 e p f 8 2 8 2 a l i 8 4 - 4 c l 8 2 8 2 a t i 1 0 0 - 3 1 0 0 - p i n t q f p - 3 e p f 8 2 8 2 a t i 1 0 0 - 3 8 2 8 2 a t b l e 0 2 a: test fixture set-up a is for general testing. b: test fixture set-up b is for high z testing (t zx# ).
cl8282a laser-configured asic page 12

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